000 00647nam a22002297a 4500
003 OSt
005 20240430201306.0
020 _a9781292231167
040 _aRDA
_cLIS-CUI Lahore
082 _26th
_a621.395 MAN
100 _aMano, M. Morris, Michael D. Ciletti
245 _aDigital Design
_bWith an introduction to verilog HDL, VHDL, and system verilog
250 _a6th
260 _aUSA
_bPearson
_c2019
300 _a710 p.
365 _aRs.
_b10547
500 _aAustralian Book Company Bill No. 9889
546 _aEnglish
650 _6Electrical Engineering
852 _pLHR 40739
_t01
_g10547
_alhr
942 _hMAN
_cBK
_2ddc
999 _c485898
_d485898