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020 _a9788131501955
082 _a621.385
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_bUYE
100 _aUyemura, John P.
245 0 _aChip design for submicron VLSI
_h[Book]
_bCMOS layout and simulation
_cJohn P. Uyemura.
260 _bCengage Learning India
300 _e1 CD ROM
521 _aAll.
650 _aChip Design--Integrated Optics
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_bMain Library
_dTextbooks
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_q1-New
_aAbbotabad Campus
852 _p10003000028340
_9775.00
_h621.385 UYE
_vLondon Book Company Peshawar
_bMain Library
_dTextbooks
_t2
_q1-New
_aAbbotabad Campus
999 _c372263
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