Chip design for submicron VLSI [Book] CMOS layout and simulation John P. Uyemura.

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TextPublication details: Cengage Learning IndiaDescription: 1 CD ROMISBN:

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Item type	Current library	Call number	Status	Date due	Barcode	Item holds
Books	COMSATS University Abbottabad Campus	621.385 UYE (Browse shelf(Opens below))	Available		10003000027293
Books	COMSATS University Abbottabad Campus	621.385 UYE (Browse shelf(Opens below))	Available		10003000028340

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Previous	621.385 BEL Digital telephony	621.385 FRA Design with operational amplifiers and analog integrated circuits	621.385 STA Operational amplifiers with linear integrated circuits	621.385 UYE Chip design for submicron VLSI CMOS layout and simulation	621.385 UYE Chip design for submicron VLSI CMOS layout and simulation	621.387 CHA Digital switching systems	621.3878 GOL Implementaion and applications of DSL technology	Next

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