Normal view MARC view ISBD view

Verilog styles for synthesis of digital systems [Book] David R. Smith.

By:

Material type: Text

TextPublication details: Prentice Hall PTR New JerseyISBN:

Subject(s):

DDC classification:

Other classification:

Tags from this library: No tags from this library for this title. Log in to add tags.

Average rating: 0.0 (0 votes)

Holdings
Item type	Current library	Call number	Status	Date due	Barcode	Item holds
Books	COMSATS University Abbottabad Campus	621.392 SMI (Browse shelf(Opens below))	Available		10003000014722

Total holds: 0

Previous				No cover image available	No cover image available		No cover image available	Next
Previous	621.392 ROT Digital systems design using VHDL	621.392 ROT Digital systems design with VHDL	621.392 ROT Digital systems design using VHDL	621.392 SMI Verilog styles for synthesis of digital systems	621.392 SPE Systemverilog for verification a guide to learning the testbench language features	621.392 STO Introduction to computer architecture	621.392 VAH Digital design	Next

All.

There are no comments on this title.

to post a comment.